1. Field of the Invention
The present invention relates to a memory protecting device which protects memory data from being lost or broken due to a reduction in a supply voltage in a compact electronic apparatus which is operated both by a built-in main power supply and an external power supply.
2. Description of the Prior Art
FIG. 3 is a block diagram of a conventional memory protecting device for use in a compact electronic apparatus equipped with an external power supply. A main block 10 includes elements which need not be backed up by a battery, such as a CPU and a ROM. A memory 20 is backed up by a backup power supply 40. An external power supply terminal 50, to which an external power supply is to be connected, is connected to a main power supply 60 at a node 70. The voltage of the external power supply terminal 50 is fed to the memory 20 and a voltage supervising circuit 30 through a diode D10. The backup power supply 40 is connected to the memory 20 and the voltage supervising circuit 30 through a diode D20. The voltage supervising circuit 30 supervises the level of voltage at the node 70, at which the main power supply 60 and the external power supply terminal 50 are connected to each other (namely, the voltage at a node 80) and the level of voltage of the backup power supply 40 (namely, the voltage at a node 90).
A conventional memory protecting device having the above-mentioned circuit construction is operated in the following way. The level of the voltage at node 90 is checked by the voltage supervising circuit 30. In the case when the level of the voltage at node 90 is detected to be below a specified level, the CPU in the main block 10 retracts the data which is being processed on the memory 20 and closes the memory 20. The memory 20 is backed up by the backup power supply 40. In the case when the level of the voltage at the node 90 is detected not to be below the specified level, the level of the voltage at the node 80 is checked. In the case when the level of the voltage at the node 80 is detected to be below a specified level, the CPU closes the memory 20 in the above-mentioned procedure. The voltage supervising circuit 30 continuously supervises the levels of the voltages at the nodes 90 and 80 in this way. When the level of either voltage is below the specified level, the memory 20 is closed in order to protect a memory data in the memory 20 from being lost or broken.
Generally, this type of memory protecting device is constructed so that an external power supply connecter which is connected to the external power supply terminal 50 cannot be easily disconnected. It sometimes occurs, however, that the connector becomes disconnected from the external power supply terminal 50 when, for example, the electronic apparatus is dropped or a shock is applied. If the main power supply 60 does not have a voltage at a sufficiently high level in such a case, the power supply to the CPU is cut off the instant the connector is disconnected, thereby undesirably preventing the memory 20 from being closed.